1. Field of the Invention
The present invention relates to a semiconductor device (silicon-controlled rectifier, abbreviated to SCR) provided with a protection circuit against static electricity.
2. Description of the Prior Art
Generally speaking, semiconductor devices produced by the CMOS (complementary metal-oxide semiconductor) process have a thin gate oxide film and are thus poorly resistant to electrostatic discharge (hereinafter called “ESD”). For this reason, many semiconductor devices produced by the CMOS process are provided with, in an input/output portion thereof (for example, between an input/output terminal and a ground terminal and between a power terminal and a ground terminal), a protection circuit against static electricity. FIGS. 11A and 11B are vertical sectional views of the structures formed in conventional semiconductor devices so as to function as an electrostatic protection circuit.
The semiconductor device shown in FIG. 11A is composed of: a p-type [p−−] semiconductor substrate 71; a low-concentration n-type [n−] semiconductor region 72 formed in the p-type semiconductor substrate 71; a high-concentration n-type [n+] semiconductor region 73 and a high-concentration p-type [p+] semiconductor region 74 formed in the low-concentration n-type semiconductor region 72 and connected to an anode terminal Ta; a high-concentration n-type [n+] semiconductor region 75 formed so as to bridge between the p-type semiconductor substrate 71 and the n-type semiconductor region 72; a low-concentration n-type [n−] semiconductor region 76 formed in the p-type semiconductor substrate 71; a high-concentration n-type [n+] semiconductor region 77 formed above and contiguously with the low-concentration n-type semiconductor region 76 and connected to a cathode terminal Tc; and an insulator 78 for isolating the high-concentration n-type semiconductor region 75 from the high-concentration n-type semiconductor region 77 (see, for example, the specification of U.S. Pat. No. 5,502,317).
The semiconductor device shown in FIG. 11B is composed of: a p-type [p−−] semiconductor substrate 81; a low-concentration n-type [n−] semiconductor region 82 formed in the p-type semiconductor substrate 81; a high-concentration n-type [n+] semiconductor region 83 and a high-concentration p-type [p+] semiconductor region 84 formed in the low-concentration n-type semiconductor region 82 and connected to an anode terminal Ta; a high-concentration n-type [n+] semiconductor region 85 formed likewise in the low-concentration n-type semiconductor region 82; a high-concentration p-type [p+] semiconductor region 86 formed so as to bridge between the p-type semiconductor substrate 81 and the low-concentration n-type semiconductor region 82; a high-concentration n-type [n+] semiconductor region 87 and a high-concentration p-type [p+] semiconductor region 88 formed in the p-type semiconductor substrate 81 and connected to a cathode terminal Tc; a polysilicon portion 89a formed between the high-concentration n-type semiconductor region 85 and the high-concentration p-type semiconductor region 86; and an element separator region 89b for insulating the high-concentration p-type semiconductor region 86 from the high-concentration n-type semiconductor region 87 (see, for example, the publication of Japanese Patent Application Laid-Open No. 2001-185738, FIG. 13).
It is true that, in the semiconductor devices structured as described above, when an ESD surge voltage is applied to the anode terminal Ta, the trigger diode formed by the p-type semiconductor substrate 71 and the high-concentration n-type semiconductor region 75, or the trigger diode formed by the high-concentration p-type semiconductor region 86 and the high-concentration n-type semiconductor region 85, breaks down and causes a short circuit between the anode terminal Ta and the cathode terminal Tc. This protects the gate oxide film from electrostatic breakdown.
However, the semiconductor devices structured as described above are designed to protect a gate oxide film formed by the common 0.18 [μm] process, and accordingly, in those semiconductor devices, the arrangement of and the impurity concentrations in the p-type and n-type semiconductors that form the trigger diode are so adjusted that the trigger voltage of the electrostatic protection circuit is about 10 [V]. Thus, as increasingly fine semiconductor production processes (for example, the 0.13 and 0.1 [μm] processes) are introduced, the gate oxide film becomes increasingly thin (for example, with a film thickness of 30 [Å] or less), until, when the gate breakdown voltage Vgbd of the gate oxide film becomes lower (for example, 5 to 6 [V]) than the trigger voltage Vt, it is no longer possible to protect the gate oxide film before it breaks down electrostatically.
Moreover, in the semiconductor devices structured as described above, the trigger diode is connected to the anode terminal Ta not directly but by way of the low-concentration n-type semiconductor region 72 or 82 so that, by adjusting the resistance of the low-concentration n-type semiconductor region 72 or 82 inserted between the anode terminal Ta and the trigger diode, the switching characteristic of the electrostatic protection circuit can be controlled. It is, however, difficult to control the resistance, and this makes it difficult to enhance the switching characteristic on which increasingly strict requirements are imposed as increasingly fine semiconductor production processes are used.